M37161M8/MA/MF-XXXSP/FP,M37161EFSP/FP
Address 020916
PWM Mode Register 2
b7b6 b5b4b3 b2b1b0
0
0
PWM mode register 2 (PM2) [Address 020916
]
B
0
Name
Functions
0 : P00 output
1 : PWM0 output
After reset R W
0
0
0
0
0
0
0
R W
P0
0
/PWM0 output
selection bit (PM20)
R W
R W
R W
R W
R W
R W
1
1
2
P0 /PWM1 output
selection bit (PM21)
1
0 : P0 output
1 : PWM1 output
2
P0 /PWM2 output
selection bit (PM22)
2
0 : P0 output
1 : PWM2 output
3
3
P0 /PWM3 output
selection bit (PM23)
3
0 : P0 output
1 : PWM3 output
4
4
P0 /PWM4 output
selection bit (PM24)
4
0 : P0 output
1 : PWM4 output
5
P0
0
/PWM0/DA output 0 : P00 PWM0 output
selection bit (PM25)
1 : DA output
6, 7
Fix these bits to “0.”
Address 020E16
ROM Correction Enable Register
b7 b6 b5 b4 b3 b2 b1 b0
ROM correction enable register (RCR) [Address 020E 16
]
After reset
0
B
Name
Functions
R W
R W
0
Vector 1 enable bit (RC0)
0: Disabled
1: Enabled
1
Vector 2 enable bit (RC1)
0: Disabled
1: Enabled
0
0
R W
Nothing is assigned. These bits are write disable bits. When
these bits are read out, the values are “0.”
2
to
7
R —
Rev.1.00 2003.11.25 page 123 of 128