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M32180F8TFP 参数 Datasheet PDF下载

M32180F8TFP图片预览
型号: M32180F8TFP
PDF下载: 下载PDF文件 查看货源
内容描述: 32位RISC单芯片微型计算机M32R系列M32R / ECU系列 [32-Bit RISC Single-Chip Microcomputers M32R Family M32R/ECU Series]
分类和应用: 计算机
文件页数/大小: 839 页 / 3694 K
品牌: RENESAS [ RENESAS TECHNOLOGY CORP ]
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MULTIJUNCTION TIMERS  
10.4 TIO (Input/Output-Related 16-Bit Timer)  
10  
10.4.14 Operation in TIO Continuous Output Mode (without Correction Function)  
(1) Outline of TIO continuous output mode  
In continuous output mode, the timer counts down starting from the set value of the counter and when the  
counter underflows, it is loaded with the reload 0 register value. Thereafter, this operation is repeated each  
time the counter underflows, thus generating consecutive pulses whose waveform is inverted in width of  
(reload 0 register set value + 1).  
When the timer is enabled (by writing to the enable bit in software or by external input) after setting the  
counter and reload 0 register, it starts counting down from the counter’s set value synchronously with the  
count clock and when the minimum count is reached, generates an underflow. This underflow causes the  
counter to be loaded with the content of the reload 0 register and start counting over again. Thereafter, this  
operation is repeated each time an underflow occurs. To stop the counter, disable count by writing to the  
enable bit in software.  
The F/F output waveform in continuous output mode is inverted (F/F output level changes from low to high or  
vice versa) at startup and upon underflow, generating a waveform of consecutive pulses until the timer stops  
counting. An interrupt request can be generated each time the counter underflows.  
The (counter set value + 1) and (reload 0 register set value + 1) are effective as count values. (For counting  
operation, see also Section 10.3.11, “Operation of TOP Continuous Output Mode.”)  
(2) Precautions on using TIO continuous output mode  
The following describes precautions to be observed when using TIO continuous output mode.  
• If the timer is enabled by external input in the same clock period as count is disabled by writing to the  
enable bit, the latter has priority so that count is disabled.  
• If the counter is accessed for read immediately after being reloaded pursuant to an underflow, the counter  
value temporarily reads as H’FFFF but immediately changes to (reload value – 1) at the next clock edge.  
• Because the timer operates synchronously with the count clock, a count clock-dependent delay is in-  
cluded before F/F output is inverted after the timer is enabled.  
32180 Group User’s Manual (Rev.1.0)  
10-124  
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