MULTIJUNCTION TIMERS
10.4 TIO (Input/Output-Related 16-Bit Timer)
10
(a) When reload register updates take effect in the current period (reflected in the next period)
Write to reload 0
(Reload 1 data latched)
Write to reload 1
H'1000
H'2000
H'8000
H'9000
Reload 0 register
Reload 1 register
Old PWM
output period
New PWM
output period
F/F output
Operation by new reload value written
Enlarged
view
New PWM
output period
Count clock
Counter
H'0001
H'0000
H'1000
H'FFFF
H'7FFF
H'7FFE
Interrupt due
to underflow
Reload 0 register
H'8000
Reload 1 register
Reload 1 buffer
H'2000
H'2000
H'9000
H'9000
F/F output
Timing at which reload 0 and reload 1
registers are updated
PWM period latched
(b) When reload register updates take effect in the next period (reflected one period later)
Write to reload 0
(Reload 1 data latched)
Write to reload 1
Reload 0 register
Reload 1 register
H'1000
H'2000
H'8000
H'9000
Old PWM
output period
Old PWM
output period
F/F output
Operation by old reload value
Enlarged
view
Old PWM
output period
Count clock
Counter
H'0001
H'0000
H'1000
H'FFFF
H'0FFF
H'0FFE
H'8000
H'9000
Interrupt due
to underflow
Reload 0 register
H'2000
H'9000
Reload 1 register
Reload 1 buffer
F/F output
H'2000
PWM period latched
Timing at which reload 0 and reload 1
registers are updated
Note: • This diagram does not show detailed timing information.
Figure 10.4.11 Reload 0 and Reload 1 Register Updates in PWM Output Mode
32180 Group User’s Manual (Rev.1.0)
10-119