No program runaway
When VPP is applied, program execution must be supervised, e.g. by the watchdog timer.
These power-on and power-off timing requirements should also be satisfied in the event of
a power failure and in recovery from a power failure. If these requirements are not
satisfied, overprogramming or overerasing may occur due to program runaway etc., which
could cause memory cells to malfunction.
•
The VPP flag is set and cleared by a threshold decision on the voltage applied to the FVPP pin.
The threshold level is between approximately VCC + 2 V to 11.4 V.
When this flag is set, it becomes possible to write to the flash memory control register
(FLMCR) and the erase block registers (EBR1 and EBR2), even though the VPP voltage may
not yet have reached the programming voltage range of 12.0 ± 0.6 V.
Do not actually program or erase the flash memory until VPP has reached the programming
voltage range.
The programming voltage range for programming and erasing flash memory is 12.0 ± 0.6 V
(11.4 V to 12.6 V). Programming and erasing cannot be performed correctly outside this range.
When not programming or erasing the flash memory, ensure that the VPP voltage does not
exceed the VCC voltage. This will prevent unintended programming and erasing.
•
In this chip, the same pin is used for STBY and FVPP. When this pin is driven low, a transition
is made to hardware standby mode. This happens not only in the normal operating modes
(modes 1, 2, and 3), but also when programming the flash memory with a PROM programmer.
When programming with a PROM programmer, therefore, use a programmer which sets this
pin to the VCC level when not programming (FVPP = 12 V).
Notes: *1 In this section, the application, release, and shutting-off of VPP are defined as follows.
Application: A rise in voltage from VCC to 12 V ± 0.6 V.
Release:
Shut-off:
A drop in voltage from 12 V ± 0.6 V to VCC.
No applied voltage (floating).
*2 In the LH version, VCC = 3.0 V to 5.5 V.
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RENESAS [ RENESAS TECHNOLOGY CORP ]
