Sample Program for Programming One Byte: This program uses the following registers.
R0H: Specifies blocks to be erased.
R1H: Stores data to be programmed.
R1L: Stores data to be read.
R3: Stores address to be programmed. Valid addresses are H'0000 to H'7FFF.
R4: Sets program and program-verify timing loop counters, and also stores register setting
value.
R5: Sets program timing loop counter.
R6L: Used for program-verify fail count.
Arbitrary data can be programmed at an arbitrary address by setting the address in R3 and the data
in R1H.
The setting of #a and #b values depends on the clock frequency. Set #a and #b values according to
tables 19.9 (1) and (2).
FLMCR:
EBR1:
EBR2:
TCSR:
.EQU
.EQU
.EQU
.EQU
H'FF80
H'FF82
H'FF83
H'FFA8
.ALIGN
MOV.B
MOV.B
2
PRGM:
#H'**,
R0H,
R0H
@EBR*:8
;
;
Set EBR*
MOV.B
MOV.W
MOV.B
INC
MOV.W
MOV.W
MOV.W
BSET
#H'00,
#H'a,
R1H,
R6L
#H'A578, R4
R4,
R5,
#0,
#1,
R4,
LOOP1
#0,
R6L
R5
@R3
; Program-verify fail counter
; Set program loop counter
; Dummy write
; Program-verify fail counter + 1 → R6L
;
PRGMS:
LOOP1:
@TCSR ; Start watchdog timer
R4
@FLMCR:8
R4
R4
; Set program loop counter
;
Set P bit
SUBS
MOV.W
BNE
;
;
; Wait loop
BCLR
@FLMCR:8
;
Clear P bit
MOV.W
MOV.W
#H'A500, R4
;
R4,
@TCSR ; Stop watchdog timer
MOV.B
BSET
DEC
#H'b ,
#2,
R4H
LOOP2
@R3,
R1H,
PVOK
#2,
R4H
@FLMCR:8
; Set program-verify loop counter
;
Set PV bit
LOOP2:
;
BNE
; Wait loop
; Read programmed address
; Compare programmed data with read data
; Program-verify decision
MOV.B
CMP.B
BEQ
R1L
R1L
BCLR
@FLMCR:8
;
Clear PV bit
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