Bit 7—Overflow Flag (OVF): Indicates that the watchdog timer count has overflowed from H'FF
to H'00.
Bit 7: OVF
Description
0
To clear OVF, the CPU must read OVF after it has been set to 1, then write a 0
in this bit
(Initial value)
1
Set to 1 when TCNT changes from H'FF to H'00
Bit 6—Timer Mode Select (WT/IT): Selects whether to operate in watchdog timer mode or
interval timer mode. When TCNT overflows, an WOVF interrupt request is sent to the CPU in
interval timer mode. For watchdog timer mode, a reset or NMI interrupt is requested.
Bit 6: WT/IT
Description
0
1
Interval timer mode (WOVF request)
Watchdog timer mode (reset or NMI request)
(Initial value)
Bit 5—Timer Enable (TME): Enables or disables the timer.
Bit 5: TME
Description
0
1
TCNT is initialized to H'00 and stopped
TCNT runs and requests a reset or an interrupt when it overflows
(Initial value)
Bit 4—Reserved: This bit cannot be modified and is always read as 1.
Bit 3: Reset or NMI Select (RST/NMI): Selects either an internal reset or internal NMI function
at watchdog timer overflow.
Bit 3: RST/NMI
Description
0
1
NMI function enabled
Reset function enabled
(Initial value)
226