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HD64F36077G 参数 Datasheet PDF下载

HD64F36077G图片预览
型号: HD64F36077G
PDF下载: 下载PDF文件 查看货源
内容描述: 旧公司名称在产品目录等资料 [Old Company Name in Catalogs and Other Documents]
分类和应用:
文件页数/大小: 566 页 / 3220 K
品牌: RENESAS [ RENESAS TECHNOLOGY CORP ]
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Section 17 I2C Bus Interface 2 (IIC2)  
Transmit Operation  
In transmit mode, transmit data is output from SDA, in synchronization with the fall of the transfer  
clock. The transfer clock is output when MST in ICCR1 is 1, and is input when MST is 0. For  
transmit mode operation timing, refer to figure 17.14. The transmission procedure and operations  
in transmit mode are described below.  
1. Set the ICE bit in ICCR1 to 1. Set the MST and CKS3 to CKS0 bits in ICCR1 to 1. (Initial  
setting)  
2. Set the TRS bit in ICCR1 to select the transmit mode. Then, TDRE in ICSR is set.  
3. Confirm that TDRE has been set. Then, write the transmit data to ICDRT. The data is  
transferred from ICDRT to ICDRS, and TDRE is set automatically. The continuous  
transmission is performed by writing data to ICDRT every time TDRE is set. When changing  
from transmit mode to receive mode, clear TRS while TDRE is 1.  
1
2
7
8
1
7
8
1
SCL  
SDA  
(Output)  
Bit 6  
Bit 7  
Bit 0  
Bit 6  
Bit 7  
Bit 0  
Bit 0  
Bit 1  
TRS  
TDRE  
ICDRT  
ICDRS  
Data 1  
Data 2  
Data 3  
Data 3  
Data 1  
Data 2  
User  
processing  
[3] Write data  
to ICDRT  
[3] Write data  
to ICDRT  
[3] Write data [3] Write data  
to ICDRT to ICDRT  
[2] Set TRS  
Figure 17.14 Transmit Mode Operation Timing  
Rev. 3.00 Sep. 10, 2007 Page 355 of 528  
REJ09B0216-0300  
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