Section 13 Timer Z
Figure 13.32 (1) and (2) show examples of PWM waveform output with 0% duty and 100% duty
in complementary PWM mode (for one phase).
•
TPSC2 = TPSC1 = TPSC0 = 0
Set GRB_0 to H'0000 or a value equal to or more than GRA_0. The waveform with a duty
cycle of 0% and 100% can be output. When buffer operation is used together, the duty cycles
can easily be changed, including the above settings, during operation. For details on buffer
operation, refer to section 13.4.8, Buffer Operation.
•
Other than TPSC2 = TPSC1 = TPSC0 = 0
Set GRB_0 to satisfy the following expression: GRA_0 + 1 < GRB_0 < H'FFFF. The
waveform with a duty cycle of 0% and 100% can be output. For details on 0%- and 100%-duty
cycle waveform output, see 3.C., Outputting a waveform with a duty cycle of 0% and 100% in
section 13.4.7, Complementary PWM Mode.
Rev. 3.00 Sep. 10, 2007 Page 248 of 528
REJ09B0216-0300
RENESAS [ RENESAS TECHNOLOGY CORP ]
