Table 2.11 lists the SH7709S system control instructions.
Table 2.11 System Control Instructions
Privileged
Mode Cycles T Bit
Instruction
CLRMAC
CLRS
Operation
0 → MACH, MACL
0 → S
Code
0000000000101000
0000000001001000
0000000000001000
0100mmmm00001110
0100mmmm00011110
0100mmmm00101110
0100mmmm00111110
0100mmmm01001110
0100mmmm10001110
0100mmmm10011110
0100mmmm10101110
0100mmmm10111110
0100mmmm11001110
0100mmmm11011110
0100mmmm11101110
0100mmmm11111110
0100mmmm00000111
0100mmmm00010111
0100mmmm00100111
0100mmmm00110111
0100mmmm01000111
0100mmmm10000111
—
—
—
√
1
1
1
5
3
3
3
3
3
3
3
3
3
3
3
3
7
5
5
5
5
5
—
—
0
CLRT
0 → T
LDC
LDC
LDC
LDC
LDC
LDC
LDC
LDC
LDC
LDC
LDC
LDC
LDC
Rm,SR
Rm → SR
Rm → GBR
Rm → VBR
Rm → SSR
Rm → SPC
LSB
—
—
—
—
—
—
—
—
—
—
—
—
LSB
—
—
—
—
—
Rm,GBR
Rm,VBR
Rm,SSR
Rm,SPC
—
√
√
√
Rm,R0_BANK Rm → R0_BANK
Rm,R1_BANK Rm → R1_BANK
Rm,R2_BANK Rm → R2_BANK
Rm,R3_BANK Rm → R3_BANK
Rm,R4_BANK Rm → R4_BANK
Rm,R5_BANK Rm → R5_BANK
Rm,R6_BANK Rm → R6_BANK
Rm,R7_BANK Rm → R7_BANK
√
√
√
√
√
√
√
√
LDC.L @Rm+,SR
LDC.L @Rm+,GBR
LDC.L @Rm+,VBR
LDC.L @Rm+,SSR
LDC.L @Rm+,SPC
(Rm) → SR, Rm + 4 → Rm
(Rm) → GBR, Rm + 4 → Rm
(Rm) → VBR, Rm + 4 → Rm
(Rm) → SSR, Rm + 4 → Rm
(Rm) → SPC, Rm + 4 → Rm
√
—
√
√
√
LDC.L @Rm+,
R0_BANK
(Rm) → R0_BANK,
Rm + 4 → Rm
√
LDC.L @Rm+,
R1_BANK
(Rm) → R1_BANK,
Rm + 4 → Rm
0100mmmm10010111
0100mmmm10100111
0100mmmm10110111
0100mmmm11000111
0100mmmm11010111
√
√
√
√
√
5
5
5
5
5
—
—
—
—
—
LDC.L @Rm+,
R2_BANK
(Rm) → R2_BANK,
Rm + 4 → Rm
LDC.L @Rm+,
R3_BANK
(Rm) → R3_BANK,
Rm + 4 → Rm
LDC.L @Rm+,
R4_BANK
(Rm) → R4_BANK,
Rm + 4 → Rm
LDC.L @Rm+,
R5_BANK
(Rm) → R5_BANK,
Rm + 4 → Rm
Rev. 5.00, 09/03, page 47 of 760
RENESAS [ RENESAS TECHNOLOGY CORP ]
