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HD6417709SF133B 参数 Datasheet PDF下载

HD6417709SF133B图片预览
型号: HD6417709SF133B
PDF下载: 下载PDF文件 查看货源
内容描述: 瑞萨32位RISC单片机超级RISC引擎族/ SH7700系列 [Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series]
分类和应用: 微控制器和处理器外围集成电路时钟
文件页数/大小: 807 页 / 4409 K
品牌: RENESAS [ RENESAS TECHNOLOGY CORP ]
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2.3.3  
Instruction Formats  
Table 2.3 explains the meaning of instruction formats and source and destination operands. The  
meaning of the operands depends on the operation code. The following symbols are used.  
xxxx:  
Operation code  
mmmm: Source register  
nnnn:  
iiii:  
dddd:  
Destination register  
Immediate data  
Displacement  
Table 2.3 Instruction Formats  
Source  
Operand  
Destination  
Operand  
Instruction  
Example  
Instruction Format  
0 format  
NOP  
15  
0
0
xxxx xxxx  
xxxx nnnn  
xxxx xxxx  
xxxx xxxx  
n format  
nnnn: register  
direct  
MOVT Rn  
15  
Control register or nnnn: register  
system register direct  
STS  
MACH,Rn  
Control register or nnnn: register  
STC.L  
system register  
indirect with  
SR,@–Rn  
pre-decrement  
m format  
mmmm: register  
direct  
Control register LDC  
15  
0
or system  
register  
Rm,SR  
xxxx mmmm xxxx xxxx  
mmmm: register  
Control register LDC.L  
indirect with post- or system  
@Rm+,SR  
increment  
register  
mmmm: register  
indirect  
JMP  
@Rm  
mmmm: PC-  
BRAF Rm  
relative using Rm  
Rev. 5.00, 09/03, page 32 of 760  
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