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HD6417709SF133B 参数 Datasheet PDF下载

HD6417709SF133B图片预览
型号: HD6417709SF133B
PDF下载: 下载PDF文件 查看货源
内容描述: 瑞萨32位RISC单片机超级RISC引擎族/ SH7700系列 [Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series]
分类和应用: 微控制器和处理器外围集成电路时钟
文件页数/大小: 807 页 / 4409 K
品牌: RENESAS [ RENESAS TECHNOLOGY CORP ]
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Addressing Instruction  
Mode  
Format  
Effective Address Calculation Method  
Calculation Formula  
Register  
@(disp:4, Effective address is register Rn contents with Byte: Rn + disp  
indirect with  
displacement  
Rn)  
4-bit displacement disp added. After disp is  
zero-extended, it is multiplied by 1 (byte), 2  
(word), or 4 (longword), according to the  
operand size.  
Word: Rn + disp × 2  
Longword: Rn + disp ×  
4
Rn  
Rn  
+ disp × 1/2/4  
disp  
(zero-extended)  
+
×
1/2/4  
Indexed  
register indirect  
@(R0, Rn) Effective address is sum of register Rn and  
R0 contents.  
Rn + R0  
Rn  
+
Rn + R0  
R0  
GBR indirect @(disp:8, Effective address is register GBR contents  
Byte: GBR + disp  
with  
displacement  
GBR)  
with 8-bit displacement disp added. After  
disp is zero-extended, it is multiplied by 1  
(byte), 2 (word), or 4 (longword), according  
to the operand size.  
Word: GBR + disp × 2  
Longword: GBR + disp  
× 4  
GBR  
GBR  
+ disp × 1/2/4  
disp  
(zero-extended)  
+
×
1/2/4  
Indexed GBR @(R0,  
indirect GBR)  
Effective address is sum of register GBR and GBR + R0  
R0 contents.  
GBR  
+
GBR + R0  
R0  
Rev. 5.00, 09/03, page 29 of 760  
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