欢迎访问ic37.com |
会员登录 免费注册
发布采购

HD6417709SF133B 参数 Datasheet PDF下载

HD6417709SF133B图片预览
型号: HD6417709SF133B
PDF下载: 下载PDF文件 查看货源
内容描述: 瑞萨32位RISC单片机超级RISC引擎族/ SH7700系列 [Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series]
分类和应用: 微控制器和处理器外围集成电路时钟
文件页数/大小: 807 页 / 4409 K
品牌: RENESAS [ RENESAS TECHNOLOGY CORP ]
 浏览型号HD6417709SF133B的Datasheet PDF文件第71页浏览型号HD6417709SF133B的Datasheet PDF文件第72页浏览型号HD6417709SF133B的Datasheet PDF文件第73页浏览型号HD6417709SF133B的Datasheet PDF文件第74页浏览型号HD6417709SF133B的Datasheet PDF文件第76页浏览型号HD6417709SF133B的Datasheet PDF文件第77页浏览型号HD6417709SF133B的Datasheet PDF文件第78页浏览型号HD6417709SF133B的Datasheet PDF文件第79页  
Addressing Instruction  
Mode  
Format  
Effective Address Calculation Method  
Calculation Formula  
PC-relative  
Rn  
Effective address is sum of register PC and  
Rn contents.  
PC + Rn  
PC  
+
PC + R0  
R0  
Immediate  
#imm:8  
#imm:8  
#imm:8  
8-bit immediate data imm of TST, AND, OR,  
or XOR instruction is zero-extended.  
8-bit immediate data imm of MOV, ADD, or  
CMP/EQ instruction is sign-extended.  
8-bit immediate data imm of TRAPA  
instruction is zero-extended and multiplied by  
4.  
Note: For the addressing modes below that use a displacement (disp), the assembler descriptions  
in this manual show the value before scaling (×1, ×2, or ×4) is performed according to the  
operand size. This is done to clarify the operation of the IC. Refer to the relevant assembler  
notation rules for the actual assembler descriptions.  
@ (disp:4, Rn) ; Register indirect with displacement  
@ (disp:8, Rn) ; GBR indirect with displacement  
@ (disp:8, PC) ; PC-relative with displacement  
disp:8, disp:12; PC-relative  
Rev. 5.00, 09/03, page 31 of 760  
 复制成功!