11.2
Register Descriptions
11.2.1 DMA Source Address Registers 0–3 (SAR0–SAR3)
DMA source address registers 0–3 (SAR0–SAR3) are 32-bit readable/writable registers that
specify the source address of a DMA transfer. During a DMA transfer, these registers indicate the
next source address.
To transfer data in 16 bits or in 32 bits, specify a 16-bit or 32-bit address boundary address. When
transferring data in 16-byte units, a 16-byte boundary (address 16n) must be set for the source
address value. Operation is not guaranteed if other addresses are specified.
An undefined value will be returned in a reset. The previous value is retained in standby mode.
Bit:
31
30
29
28
27
26
25
24
Initial value:
R/W:
—
—
—
—
—
—
—
—
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Bit:
23
22
21
20
…
…
…
…
0
Initial value:
R/W:
—
—
—
—
—
R/W
R/W
R/W
R/W
R/W
Rev. 5.00, 09/03, page 333 of 760
RENESAS [ RENESAS TECHNOLOGY CORP ]
