11.1.4
Register Configuration
Table 11.2 summarizes the DMAC registers. The DMAC has a total of 17 registers: each channel
has four registers, and one overall DMAC control register.
Table 11.2 DMAC Registers
Abbrevi-
ation
Register Access
Channel Name
DMA source address
R/W
Initial Value Address
Size
Size
2
2
3
*
*
*
0
1
2
SAR0
R/W
Undefined
Undefined
Undefined
H'04000020
32
16, 32
4
4
4
*
*
*
register 0
(H'A4000020)
DMA destination
address register 0
DAR0
R/W
H'04000024
32
24
32
32
32
24
32
32
32
24
32
16, 32
16, 32
(H'A4000024)
DMA transfer count
register 0
DMATCR0 R/W
H'04000028
(H'A4000028)
1
1
1
2
2
2
*
*
*
*
*
*
DMA channel control
register 0
CHCR0
SAR1
R/W
R/W
R/W
H'00000000 H'0400002C
8, 16, 32
4
*
(H'A400002C)
2
*
*
*
DMA source address
register 1
Undefined
Undefined
Undefined
H'04000030
16, 32
16, 32
16, 32
4
4
4
*
(H'A4000030)
2
3
DMA destination
address register 1
DAR1
H'04000034
*
(H'A4000034)
DMA transfer count
register 1
DMATCR1 R/W
H'04000038
*
(H'A4000038)
DMA channel control
register 1
CHCR1
SAR2
R/W
R/W
R/W
H'00000000 H'0400003C
8, 16, 32
4
*
(H'A400003C)
2
*
*
*
DMA source address
register 2
Undefined
Undefined
Undefined
H'04000040
16, 32
16, 32
16, 32
4
4
4
*
(H'A4000040)
2
3
DMA destination
address register 2
DAR2
H'04000044
*
(H'A4000044)
DMA transfer count
register 2
DMATCR2 R/W
H'04000048
*
(H'A4000048)
DMA channel control
register 2
CHCR2
R/W
H'00000000 H'0400004C
8, 16, 32
4
*
(H'A400004C)
Rev. 5.00, 09/03, page 331 of 760