欢迎访问ic37.com |
会员登录 免费注册
发布采购

HD6417709SF133B 参数 Datasheet PDF下载

HD6417709SF133B图片预览
型号: HD6417709SF133B
PDF下载: 下载PDF文件 查看货源
内容描述: 瑞萨32位RISC单片机超级RISC引擎族/ SH7700系列 [Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series]
分类和应用: 微控制器和处理器外围集成电路时钟
文件页数/大小: 807 页 / 4409 K
品牌: RENESAS [ RENESAS TECHNOLOGY CORP ]
 浏览型号HD6417709SF133B的Datasheet PDF文件第340页浏览型号HD6417709SF133B的Datasheet PDF文件第341页浏览型号HD6417709SF133B的Datasheet PDF文件第342页浏览型号HD6417709SF133B的Datasheet PDF文件第343页浏览型号HD6417709SF133B的Datasheet PDF文件第345页浏览型号HD6417709SF133B的Datasheet PDF文件第346页浏览型号HD6417709SF133B的Datasheet PDF文件第347页浏览型号HD6417709SF133B的Datasheet PDF文件第348页  
Self-Refreshing  
Self-refresh mode is a kind of standby mode in which the refresh timing and refresh addresses  
are generated within the synchronous DRAM. Self-refreshing is activated by setting both the  
RMODE bit and the RFSH bit to 1. The self-refresh state is maintained while the CKE signal  
is low. Synchronous DRAM cannot be accessed while in the self-refresh state. Self-refresh  
mode is cleared by clearing the RMODE bit to 0. After self-refresh mode has been cleared,  
command issuance is disabled for the number of cycles specified by the TPC bits in MCR.  
Self-refresh timing is shown in figure 10.27. Settings must be made so that self-refresh  
clearing and data retention are performed correctly, and auto-refreshing is performed at the  
correct intervals. When self-refreshing is activated from the state in which auto-refreshing is  
set, or when exiting standby mode other than through a power-on reset, auto-refreshing is  
restarted if RFSH is set to 1 and RMODE is cleared to 0 when self-refresh mode is cleared. If  
the transition from clearing of self-refresh mode to the start of auto-refreshing takes time, this  
time should be taken into consideration when setting the initial value of RTCNT. Making the  
RTCNT value 1 less than the RTCOR value will enable refreshing to be started immediately.  
After self-refreshing has been set, the self-refresh state continues even if the chip standby state  
is entered using the SH7709S’s standby function, and is maintained even after recovery from  
standby mode other than through a power-on reset. In case of a power-on reset, the bus state  
controller’s registers are initialized, and therefore the self-refresh state is cleared.  
Self-refreshing is performed in normal operation, in sleep mode, in standby mode, and in case  
of a manual reset.  
When using synchronous DRAM, use the following procedure to initiate self-refreshing.  
1. Clear the refresh control bit to 0.  
2. Write H'00 to the RTCNT register.  
3. Set the refresh control bit and refresh mode bit to 1.  
Rev. 5.00, 09/03, page 300 of 760  
 复制成功!