7.1.2
Block Diagram
Figure 7.1 shows a block diagram of the UBC.
Access
Control
IAB
LAB
MDB
Access
comparator
BBRA
BARA
Address
comparator
BAMRA
ASID
comparator
BASRA
Channel A
Access
comparator
BBRB
BARB
Address
comparator
BAMRB
ASID
comparator
BASRB
BDRB
Data
comparator
BDMRB
Channel B
PC Trace
BETR
BRSR
BRDR
BRCR
CONTROL
LDB/IDB/
XDB/YDB
User break request
CPU state
signals
UBC Location
CCN Location
Legend
BBRA:
BARA:
Break bus cycle register A
Break address register A
BASRB: Break ASID register B
BDRB: Break data register B
BDMRB: Break data mask register B
BAMRA: Break address mask register A
BASRA: Break ASID register A
BBRB: Break bus cycle register B
BARB: Break address register B
BAMRB: Break address mask register B
BETR:
BRSR:
BRDR:
BRCR:
Break execution times register
Branch source register
Branch destination register
Break control register
Figure 7.1 Block Diagram of User Break Controller
Rev. 5.00, 09/03, page 150 of 760
RENESAS [ RENESAS TECHNOLOGY CORP ]
