7.2
Register Descriptions
7.2.1
Break Address Register A (BARA)
BARA is a 32-bit read/write register. BARA specifies the address used as a break condition in
channel A. A power-on reset initializes BARA to H'00000000.
Bit:
31
30
29
28
27
26
25
24
BAA31 BAA30 BAA29 BAA28 BAA27 BAA26 BAA25 BAA24
Initial value:
R/W:
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Bit:
23
22
21
20
19
18
17
16
BAA23 BAA22 BAA21 BAA20 BAA19 BAA18 BAA17 BAA16
Initial value:
R/W:
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Bit:
15
14
13
12
11
10
9
BAA9
0
8
BAA8
0
BAA15 BAA14 BAA13 BAA12 BAA11 BAA10
Initial value:
R/W:
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Bit:
7
BAA7
0
6
BAA6
0
5
BAA5
0
4
BAA4
0
3
BAA3
0
2
BAA2
0
1
BAA1
0
0
BAA0
0
Initial value:
R/W:
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Bits 31 to 0—Break Address A31 to A0 (BAA31 to BAA0): Stores the address on the LAB or
IAB specifying break conditions of channel A.
Rev. 5.00, 09/03, page 152 of 760
RENESAS [ RENESAS TECHNOLOGY CORP ]
