Table 14.18 DMAC Interrupt-Request Codes
Source of the Interrupt
DMTE0
Description
INTEVT Code
H'640
Priority
CH0 transfer-end interrupt
CH1 transfer-end interrupt
CH2 transfer-end interrupt
CH3 transfer-end interrupt
CH4 transfer-end interrupt
CH5 transfer-end interrupt
CH6 transfer-end interrupt
CH7 transfer-end interrupt
Address error interrupt
High
DMTE1
H'660
DMTE2
H'680
DMTE3
H'6A0
DMTE4
H'780
DMTE5
H'7A0
DMTE6
H'7C0
DMTE7
H'7E0
DMAE
H'6C0
Low
DMTE4–DMTE7: These codes are not used in the SH7750 or SH7750S.
CKIO
/
RA
BA
CA
RD
A25–A0
D63–D0
DTR
D2
D0
D1
RAS,
CAS, WE
ID1, ID0
00
Figure 14.55 Single Address Mode/Burst Mode/External Bus → External Device 32-Byte
Block Transfer/Channel 0 On-Demand Data Transfer
Rev. 6.0, 07/02, page 589 of 986
RENESAS [ RENESAS TECHNOLOGY CORP ]
