Table 13.18 Relationship between Address and CE when Using PCMCIA Interface
Bus
Width
(Bits)
Access
Read/ Size
Odd/
1
*
Write (Bits)
Even IOIS16 Access CE2 CE1 A0
D15–D8
D7–D0
8
Read
8
Even Don’t
care
—
1
0
0
Invalid
Read data
Odd
Don’t
care
—
1
0
1
Invalid
Invalid
Invalid
—
Read data
Lower read data
Upper read data
—
16
Even Don’t
care
First
Second
—
1
0
0
Even Don’t
care
1
0
1
Odd
Don’t
care
—
1
—
0
—
0
Write
8
Even Don’t
care
—
Invalid
Invalid
Invalid
Invalid
—
Write data
Write data
Lower write data
Upper write data
—
Odd
Don’t
care
—
1
0
1
16
Even Don’t
care
First
Second
—
1
0
0
Even Don’t
care
1
0
1
Odd
Don’t
care
—
1
—
0
—
0
16
Read
8
Even Don’t
care
—
Invalid
Read data
Read data
Invalid
Odd
Don’t
care
—
0
1
1
16
8
Even Don’t
care
—
0
0
0
Upper read data Lower read data
Odd
Don’t
care
—
—
1
—
0
—
0
—
—
Write
Even Don’t
care
—
Invalid
Write data
Write data
Invalid
Odd
Don’t
care
—
0
1
1
16
Even Don’t
care
—
0
0
0
Upper write data Lower write data
Odd
Don’t
care
—
—
—
—
—
—
Rev. 6.0, 07/02, page 446 of 986
RENESAS [ RENESAS TECHNOLOGY CORP ]
