Table 13.11 (1) 64-Bit External Device/Little-Endian Access and Data Alignment
Operation
Data Bus
Access
Size
Address No. D63–56 D55–48 D47–40 D39–32 D31–24 D23–16 D15–8
D7–0
Byte
8n
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Data
7–0
8n+1
8n+2
8n+3
8n+4
8n+5
8n+6
8n+7
Data
7–0
—
—
—
—
—
—
—
Data
7–0
—
—
—
—
—
—
Data
7–0
—
—
—
—
—
—
Data
7–0
—
—
—
—
—
Data
7–0
—
—
—
—
Data
7–0
—
—
—
Data
7–0
—
—
—
—
Word 8n
8n+2
—
—
—
Data
15–8
Data
7–0
Data
15–8
Data
7–0
—
—
—
—
—
—
8n+4
8n+6
Data
15–8
Data
7–0
—
—
Data
15–8
Data
7–0
—
—
—
—
Long- 8n
word
—
—
—
—
Data
31–24
Data
23–16
Data
15–8
Data
7–0
8n+4
Data
31–24
Data
23–16
Data
15–8
Data
7–0
—
—
—
—
Quad- 8n
word
Data
63–56
Data
55–48
Data
47–40
Data
39–32
Data
31–24
Data
23–16
Data
15–8
Data
7–0
Rev. 6.0, 07/02, page 377 of 986