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HD6417750SBP200 参数 Datasheet PDF下载

HD6417750SBP200图片预览
型号: HD6417750SBP200
PDF下载: 下载PDF文件 查看货源
内容描述: 的SuperH RISC引擎 [SuperH RISC engine]
分类和应用: 外围集成电路时钟
文件页数/大小: 1039 页 / 6201 K
品牌: RENESAS [ RENESAS TECHNOLOGY CORP ]
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Bits 2n + 1, 2n—Area n (1 to 6) Bus Width Specification (AnSZ1, AnSZ0): These bits specify  
the bus width of area n (n = 1 to 6).  
(Bit 0): PORTEN Bit 2n + 1: AnSZ1  
Bit 2n: AnSZ0 Description  
0
0
1
0
1
0
1
0
1
0
1
0
1
Bus width is 64 bits  
Bus width is 8 bits  
Bus width is 16 bits  
Bus width is 32 bits  
(Initial value)  
1
Reserved (Setting prohibited)  
Bus width is 8 bits  
Bus width is 16 bits  
Bus width is 32 bits  
Bit 1—Reserved: This bit is always read as 0, and should only be written with 0.  
Bit 0—Port Function Enable (PORTEN): Specifies whether pins D51 to D32 are used as a 20-  
bit port. When this function is used, a bus width of 8, 16, or 32 bits should be set for all areas.  
Bit 0: PORTEN  
Description  
0
1
D51 to D32 are not used as a port  
D51 to D32 are used as a port  
(Initial value)  
Rev. 6.0, 07/02, page 336 of 986  
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