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HD6417750SBP200 参数 Datasheet PDF下载

HD6417750SBP200图片预览
型号: HD6417750SBP200
PDF下载: 下载PDF文件 查看货源
内容描述: 的SuperH RISC引擎 [SuperH RISC engine]
分类和应用: 外围集成电路时钟
文件页数/大小: 1039 页 / 6201 K
品牌: RENESAS [ RENESAS TECHNOLOGY CORP ]
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When using the PCMCIA interface, set a bus width of 8 or 16 bits.  
For details, see section 13.3.7, PCMCIA Interface.  
When using port functions, set a bus width of 8, 16, or 32 bits for all areas.  
For details, see section 13.2.2, Bus Control Register 2 (BCR2), and section 13.2.7, Memory  
Control Register (MCR).  
The area 7 address range, H'1C000000 to H'1FFFFFFFF, is a reserved space and must not be used.  
Note: * SH7750R only  
13.1.6  
PCMCIA Support  
The SH7750 Series supports PCMCIA compliant interface specifications for external memory  
space areas 5 and 6.  
The interfaces supported are the IC memory card interface and I/O card interface stipulated in  
JEIDA specifications version 4.2 (PCMCIA2.1).  
External memory space areas 5 and 6 support both the IC memory card interface and the I/O card  
interface.  
The PCMCIA interface is supported only in little-endian mode.  
Table 13.4 PCMCIA Interface Features  
Item  
Features  
Access  
Random access  
Data bus  
Memory type  
8/16 bits  
Mask ROM, OTPROM, EPROM, EEPROM, flash memory, SRAM  
Common memory capacity Max. 64 Mbytes  
Attribute memory capacity  
Others  
Max. 64 Mbytes  
Dynamic bus sizing for I/O bus width, access to PCMCIA interface  
from address translation areas  
Rev. 6.0, 07/02, page 322 of 986  
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