INTERRUPTS
6.7 Sequence from acceptance of interrupt request until execution of interrupt routine
6.7.2 Push operation for registers
The push operation for registers performed in the INTACK sequence depends on whether the contents of
the stack pointer (S) at acceptance of an interrupt request are even or odd.
When the contents of the stack pointer (S) are even, the contents of the program counter (PC) and the
processor status register (PS) are simultaneously pushed in a unit of 16 bits. When the contents of the
stack pointer (S) are odd, each of PC and PS is pushed in a unit of 8 bits. Figure 6.7.3 shows the push
operation for registers.
In the INTACK sequence, only the contents of the program bank register (PG), program counter (PC), and
processor status register (PS) are pushed onto the stack area. Other necessary registers must be pushed
by software at the start of the interrupt routine.
By using the PSH instruction, all CPU registers, except the stack pointer (S), can be pushed with 1
instruction.
(1) When contents of stack pointer (S) are even
Address
[S] – 5 (odd)
Order for push
Low-order byte of processor status register (PSL)
[S] – 4 (even)
[S] – 3 (odd)
[S] – 2 (even)
[S] – 1 (odd)
[S] (even)
➀➀Pushed in a unit of 16 bits.
High-order byte of processor status register (PS
Low-order byte of program counter (PC
H)
L
)
➀➀Pushed in a unit of 16 bits.
High-order byte of program counter (PC
Program bank register (PG)
H
)
➀
Pushed in 3 times.
(2) When contents of stack pointer (S) are odd
Address
Order for push
[S] – 5 (even)
Low-order byte of processor status register (PS
L)
[S] – 4 (odd)
[S] – 3 (even)
[S] – 2 (odd)
[S] – 1 (even)
[S] (odd)
➀
➀
High-order byte of processor status register (PS
H
)
Pushed in a unit of 8 bits.
Low-order byte of program counter (PC )
L
➀
➀
➀
High-order byte of program counter (PC
Program bank register (PG)
H
)
Pushed in 5 times.
➀
[S] is the initial address that the stack pointer (S) indicates at acceptance of an interrupt request.
The S’s contents become “[S] – 5” after all of the above registers are pushed.
Fig. 6.7.3 Push operation for registers
7906 Group User’s Manual Rev.2.0
6-15
RENESAS [ RENESAS TECHNOLOGY CORP ]
