INTERRUPTS
6.10 External interrupts
6.10 External interrupts
The external interrupts consist of INTi interrupts.
6.10.1 INT
An INT (i = 3 to 7) interrupt request occurs by an input signal to pin INT
factor of the INT interrupt request.
The allocation of pin INT can be changed by the pin INT
When using any of pins P7 (P2 )/INT , P5 /INT , P5 /INT , P5
be sure to clear the port direction register’s bit corresponding to the above pin. (See Figure 6.10.3.)
When using pin P6OUTCUT/INT as an input pin of an external interrupt (pin INT ), be sure to use port pins
P6 to P6 in the input mode. (Refer to section “5.2.3 Pin P6OUTCUT/INT .”)
The signal input to pin INT requires “H” or “L” level width of 250 ns or more, independent of f(XIN).
By reading out the INT read bit (See Figure 6.10.2.), the state of pin INT can be read out.
i
interrupt
i
i
. Table 6.10.1 lists the occurrence
i
3
3
/RTPTRG0 select bit. (See Figure 6.10.1.)
/INT as an input pin of the external interrupt,
4
7
3
5
5
6
6
7
7
4
4
0
5
4
i
i
i
Note: Selection of the interrupt occurrence factor requires the following conditions:
• when an input signal’s falling edge or “L” level is selected, be sure that “L” level width ≥ 250 ns.
• when an input signal’s rising edge or “H” level is selected, be sure that “H” level width ≥ 250 ns.
Table 6.10.1 Occurrence factor of INT
i
interrupt request
Occurrence factor of interrupt request
(An interrupt request occurs when the
Polarity select bit
Level sense/Edge sense
(bit 4 at addresses 6E16
,
select bit (bit 5 at addresses
input signal of pin INT is as follows.)
i
6F16, FD16 to FF16
)
6E16, 6F16, FD16 to FF16
)
Falling edge (Edge sense)
Rising edge (Edge sense)
“H” level (Level sense)
“L” level (Level sense)
0
1
0
1
INT
3
to INT
7
0
0
1
1
The INT
i
interrupt request occurs by detecting the state of pin INT
i
all the time. Therefore, when the user
does not use an INT
i
interrupt, be sure to set the INT interrupt’s priority level to 0.
i
7906 Group User’s Manual Rev.2.0
6-18
RENESAS [ RENESAS TECHNOLOGY CORP ]
