INTERRUPTS
6.10 External interrupts
6.10 External interrupts
The external interrupts consist of INT
i
interrupts.
6.10.1 INT
i
interrupt
An INT
i
(i = 3 to 7) interrupt request occurs by an input signal to pin INT
i
. Table 6.10.1 lists the occurrence
factor of the INT
i
interrupt request.
The allocation of pin INT
3
can be changed by the pin INT
3
/RTP
TRG0
select bit. (See Figure 6.10.1.)
When using any of pins P7
4
(P2
7
)/INT
3
, P5
5
/INT
5
, P5
6
/INT
6
, P5
7
/INT
7
as an input pin of the external interrupt,
be sure to clear the port direction register’s bit corresponding to the above pin. (See Figure 6.10.3.)
When using pin P6OUT
CUT
/INT
4
as an input pin of an external interrupt (pin INT
4
), be sure to use port pins
P6
0
to P6
5
in the input mode. (Refer to section
“5.2.3 Pin P6OUT
CUT
/INT
4
.”)
The signal input to pin INT
i
requires “H” or “L” level width of 250 ns or more, independent of f(X
IN
).
By reading out the INT
i
read bit (See Figure 6.10.2.), the state of pin INT
i
can be read out.
Note:
Selection of the interrupt occurrence factor requires the following conditions:
• when an input signal’s falling edge or “L” level is selected, be sure that “L” level width
≥
250 ns.
• when an input signal’s rising edge or “H” level is selected, be sure that “H” level width
≥
250 ns.
Table 6.10.1 Occurrence factor of INT
i
interrupt request
Polarity select bit
Level sense/Edge sense
select bit (bit 5 at addresses (bit 4 at addresses 6E
16
,
6E
16
, 6F
16
, FD
16
to FF
16
)
6F
16
, FD
16
to FF
16
)
Occurrence factor of interrupt request
(An interrupt request occurs when the
input signal of pin INT
i
is as follows.)
Falling edge (Edge sense)
Rising edge (Edge sense)
“H” level (Level sense)
“L” level (Level sense)
INT
3
to INT
7
0
0
1
1
0
1
0
1
The INT
i
interrupt request occurs by detecting the state of pin INT
i
all the time. Therefore, when the user
does not use an INT
i
interrupt, be sure to set the INT
i
interrupt’s priority level to 0.
6-18
7906 Group User’s Manual Rev.2.0