APPENDIX
Appendix 8. 7906 Group Q & A
Interrupts
Q
Suppose that there is a routine which should not accept a certain interrupt request. (This routine can
accept any of the other interrupt request.)
Although the interrupt priority level select bits for a certain interrupt are set to “0002” (in other words,
although this interrupt is set to be disabled), this interrupt request is actually accepted immediately
after the change of the priority level. Why did this occur, and what should I do about it?
:
Interrupt request is
MOVMB XXXIC, #00H ; Writes “0002” to the interrupt priority level select bits.
accepted in this
interval
→
; Clears the interrupt request bit to “0.”
; Instruction at the beginning of the routine which
should not accept a certain interrupt request.
;
LDA
A,DATA
:
A
As for the change of the interrupt priority level, if the following are met, the microcomputer may
pretend to accept an interrupt request immediately after this interrupt is set to be disabled:
•The next instruction (in the above example, it is the LDA instruction) is already stored into a instruc-
tion queue buffer of the BIU.
•Requirements for accepting the interrupt request which should not be accepted are satisfied immediately
before the next instruction in the instruction queue buffer is executed.
When writing to a memory or an I/O, the CPU passes an address and data to the BIU. Then, the CPU
executes the next instruction in the instruction queue buffer while the BIU is writing data into the
actual address. Detection of the interrupt priority level is performed at the beginning of each instruction.
In the above case, the CPU executes the next instruction before the BIU completes the change of
the interrupt priority level. Therefore, in the detection of the interrupt priority level performed synchronously
with the execution of the next instruction, actually, the interrupt priority level before the change is
used to detection, and its interrupt request is accepted.
Interrupt request generated
Interrupt request accepted
Sequence of execution
Interrupt priority detection time
Previous instruction
executed
MOVMB instruction
LDA instruction
executed
CPU operation
BIU operation
executed
(Instruction prefetched)
Writing to interrupt priority level select bits.
Change of interrupt priority level
completed
(1/2)
7906 Group User’s Manual Rev.2.0
20-104
RENESAS [ RENESAS TECHNOLOGY CORP ]
