APPENDIX
Appendix 8. 7906 Group Q & A
Interrupts
Q
(1) Which timing of clock φ
1
is the external interrupts (input signals to the INT
i
pin) detected?
(2) When external interrupt input (INT
i
) pins are not enough, what should I do?
A
(1) In both of the edge sense and level sense, an external interrupt request occurs when the
input signal to the INT pin changes its level. This is independent of clock φ
In the edge sense, also, the interrupt request bit is set to “1” at this time.
i
1
.
(2) There are two methods: one uses external interrupt’s level sense, and the other uses the
timer’s event counter mode.
➀ Method using external interrupt’s level sense
As for hardware, input a logical sum of multiple interrupt signals (e.g., ‘a’, ‘b’, and ‘c’) to the
INT pin, and input each signal to each corresponding port pin.
i
As for software, check the port pin’s input levels in the INT
which signal (‘a’, ‘b’, or ‘c’) was input.
i
interrupt routine in order to detect
M37906
Port pin
Port pin
Port pin
a
b
c
INT
i
➀ Method using timer’s event counter mode
As for hardware, input an interrupt signal to the TAiIN pin or TBiIN pin.
As for software, set the timer’s operating mode to the event counter mode. Then, set a value
of “000016” into the timer register and select the valid edge.
A timer’s interrupt request occurs when an interrupt signal (selected valid edge) is input.
7906 Group User’s Manual Rev.2.0
20-107