CENTRAL PROCESSING UNIT (CPU)
2.5 Processor modes
2.5.2 Setting of processor mode
The processor mode is set by the following:
• Voltage level applied to the MD0 and MD1 pins
• Processor mode bits (bits 1 and 0 at address 5E16
)
The VSS–level voltage must be applied to the MD0 and MD1 pins, because the M37906 operates only in
the single-chip mode. Also, the processor mode bit must be “00.”
Figure 2.5.2 shows the structure of the processor mode register 0 (address 5E16).
b7 b6 b5 b4 b3 b2 b1 b0
Processor mode register 0 (Address 5E16)
0
0
X X
0
Bit
0
Bit name
Function
At reset
R/W
RW
b1 b0
Processor mode bits
0
0 0 : Single-chip mode
0 1 : Do not select.
1 0 : Do not select.
1 1 : Do not select.
0
1
RW
2
3
4
Any of these bits may be either “0” or “1.”
0
1
0
RW
RW
RW
b5 b4
Interrupt priority detection time
select bits
0 0 : 7 cycles of fsys
0 1 : 4 cycles of fsys
1 0 : 2 cycles of fsys
1 1 : Do not select.
5
RW
WO
RW
0
0
0
The microcomputer is reset by writing “1” to this
bit. The value is “0” at reading.
Software reset bit
6
7
Fix this bit to “0.”
X : It may be either “0” or “1.”
Fig. 2.5.3 Structure of processor mode register 0
7906 Group User’s Manual Rev.2.0
2-20
RENESAS [ RENESAS TECHNOLOGY CORP ]
