STOP AND WAIT MODES
15.3 Stop mode
❈ When using watchdog timer
Stop mode
fXIN
f
PLL (Note)
φ1
φBIU
Interrupt request to be
used for stop mode
termination
fX
i
❈ 2048 counts
(Interrupt request bit)
FFF16
Value of watchdog timer
7FF16
Operating
Operating
Stopped
Stopped
Stopped
Operating
Operating
CPU
Operating
Internal peripheral devices
❈ STP instru-
ction is
executed.
❈ Watchdog timer’s MSB = “0”
(However, watchdog timer interrupt
request does not occur.)
❈ Each supply of φCPU, φBIU starts.
❈ Interrupt request which was used for
❈ Interrupt request to be used for
termination occurs.
❈ Oscillation starts.
(When an external clock is input
from pin XIN, clock input starts.)
❈ PLL frequency multiplier starts its
operation.
termination is accepted.
❈ Watchdog timer starts counting.
Note: This applies when the PLL circuit operation enable bit (bit 1 at address BC16) = “1.”
fX : fX16, fX32, fX64, fX128
These are clocks selected by the watchdog timer clock source select bits at STP termination (bits 7, 6 at address 6116.)
i
.
❈ When not using watchdog timer
Stop mode
fXIN
φ1
φBIU
Interrupt request to be
used for stop mode
termination
(Note)
(Interrupt request bit)
FFF16
Value of watchdog timer
7FF16
CPU Operating
Stopped
Stopped
Stopped
Operating
Operating
Internal peripheral devices
Operating
Operating
❈ STP instru- ❈ Interrupt
❈ Each supply of φCPU, φBIU starts.
❈ Interrupt request which was used
for termination is accepted.
ction is
request to
be used for
termination
occurs.
executed.
❈ Clock input from pin XIN starts.
❈ Watchdog timer starts counting.
Note: Time listed in Table 15.3.2. See Figure 19.1.3 for the built-in flash memory version.
Fig. 15.3.1 Stop mode terminate sequence owing to interrupt request occurrence
7906 Group User’s Manual Rev.2.0
15-10
RENESAS [ RENESAS TECHNOLOGY CORP ]
