SERIAL I/O
11.4 Clock asynchronous serial I/O (UART) mode
11.4.7 Processing on detecting error
In the UART mode, 3 types of errors can be detected. Each error can be detected when the data in the
UARTi receive register is transferred to the UARTi receive buffer register, and the corresponding error flag
is set to “1.” When any error occurs, the error sum flag is set to “1.” Accordingly, presence of errors can
be judged by using the error sum flag.
Table 11.4.6 lists the conditions for setting each error flag to “1” and method to clear it to “0.”
Additionally, when the receive error interrupt is selected (UARTi receive interrupt mode select bit = “1”),
the UARTi receive interrupt request bit is set to “1” only when each error has occurred. When the receive
interrupt is selected (UARTi receive interrupt mode select bit = “0”), the UARTi receive interrupt request
bit is set to “1” when reception has been completed or when a framing or parity error has occurred. (Even
when an overrun error has occurred, this bit does not change).
Table 11.4.6 Conditions for setting each error flag to “1” and method to clear it to “0”
Error flag
Conditions for setting
Method to clear
Overrun error flag
When the next data is prepared in the • Clear the receive enable bit to “0.”
UARTi receive register with the receive
complete flag = “1” (i.e. data is present
in the UARTi receive buffer register). In
other words, when the next data is
prepared before the contents of the UARTi
receive buffer register are read out (Note).
When the number of detected stop bits
does not match the set number of stop
bits.
Framing error flag
Parity error flag
Error sum flag
• Clear the receive enable bit to “0.”
• Read out the low-order byte of the UARTi
receive buffer register.
When the sum of “1”s in the sum of the
parity bit and character bits does not match
the set number of “1”s.
• Clear the receive enable bit to “0.”
• Read out the low-order byte of the UARTi
receive buffer register.
When any error listed above has occurred.
• Clear the all error flags, which are
overrun, framing and parity error flags.
Note: The next data is written into the UARTi receive buffer register.
When an error occurs during reception, be sure to initialize the error flag and the UARTi receive buffer
register, and then perform reception again. When it is necessary to perform retransmission owing to an
error which has occurred on the receiver side during transmission, be sure to set the UARTi transmit buffer
register again, and then perform the retransmission.
The method to initialize the UARTi receive buffer register and that to set the UARTi transmit buffer register
again are described below.
(1) Method to initialize UARTi receive buffer register
✕ Clear the receive enable bit to “0” (reception disabled).
✕ Set the receive enable bit to “1” again (reception enabled).
(2) Method to set UARTi transmit buffer register again
✕ Clear the serial I/O mode select bits to “000
✕ Set the serial I/O mode select bits again.
2
” (serial I/O invalid).
✕ Set the transmit enable bit to “1” (transmission enabled), and set the transmit data to the UARTi
transmit buffer register.
7906 Group User’s Manual Rev.2.0
11-52
RENESAS [ RENESAS TECHNOLOGY CORP ]
