PULSE OUTPUT PORT MODE
9.3 Setting of pulse output port mode
From preceding “Figure 9.3.2”
Selecting pulse output data, pulse output mode, pulse width modulation
b7
b0
Three-phase output data register 0 (Address A816
)
0
0
RTP0
0
RTP0
RTP0
RTP0
RTP1
RTP1
1
2
3
The output data is set.
0
1
Pulse output trigger select bits
Underflow of Timer A0
b7
b0
Three-phase output data register 1 (Address A916
)
➀ ➀ ➀ ➀
Pulse width modulation enable bit 0
Pulse width modulation enable bit 1
See Table 9.2.3.
Pulse width modulation enable bit 2
Pulse output polarity select bit
0 : Positive
1 : Negative
X : It may be either “0” or “1.”
Setting of timer A0
b7
b0
Timer A0 mode register (Address 5616
)
0
0
0
0
0
0
Count source select bits
See Table 7.2.3.
(b15)
b7
(b8)
b0 b7
b0
Timer A0 register (Addresses 4716 and 4616
)
0016
0016
A value in the range from “000016” to
“FFFF16” (n) is set.
b7
b0
Timer A0 interrupt control register (Address 7516
)
0
Interrupt priority level select bits
When using interrupts, set these bits to one of levels 1 to 7.
When disabling interrupts, set these bits to level 0.
No interrupt request
Continue to “Figure 9.3.4.”
Fig. 9.3.3 Initial setting example for registers relevant to pulse output port mode (in pulse mode 1) (3)
7906 Group User’s Manual Rev.2.0
9-16
RENESAS [ RENESAS TECHNOLOGY CORP ]
