欢迎访问ic37.com |
会员登录 免费注册
发布采购

7905 参数 Datasheet PDF下载

7905图片预览
型号: 7905
PDF下载: 下载PDF文件 查看货源
内容描述: 16位单片机 [16-BIT SINGLE-CHIP MICROCOMPUTER]
分类和应用: 计算机
文件页数/大小: 565 页 / 3295 K
品牌: RENESAS [ RENESAS TECHNOLOGY CORP ]
 浏览型号7905的Datasheet PDF文件第208页浏览型号7905的Datasheet PDF文件第209页浏览型号7905的Datasheet PDF文件第210页浏览型号7905的Datasheet PDF文件第211页浏览型号7905的Datasheet PDF文件第213页浏览型号7905的Datasheet PDF文件第214页浏览型号7905的Datasheet PDF文件第215页浏览型号7905的Datasheet PDF文件第216页  
PULSE OUTPUT PORT MODE  
9.5 Pulse output port mode operation  
9.5 Pulse output port mode operation  
The operation of pulse output port 0 is described below and is also applied to the operation of pulse output port 1.  
9.5.1 Pulse output trigger  
(1) RTP0  
The pulse output trigger can be selected from an internal trigger and an external trigger.  
When the pulse output trigger select bits (bits 7, 6 at address A816) = 00 ,an internal trigger is  
,an external trigger is selected.  
0
to RTP0  
3
in pulse mode 0; RTP0  
0
to RTP0  
3
, RTP1  
0
, RTP1  
1
in pulse mode 1  
2
selected; when these bits = 01  
2
,” “10  
2
,or 11  
2
Internal trigger  
A trigger occurs at an underflow of timer A0. This trigger occurrence can be confirmed by using  
the timer A0 interrupt request bit.  
External trigger  
A trigger occurs at a valid edge input to pin RTPTRG0 (Note). This trigger occurrence can be confi-  
rmed by using the INT  
edges.  
3
interrupt request bit. Table 9.5.1 lists the setting of INT according to valid  
3
When using pin P5  
3
/RTPTRG0 as an input pin for an external trigger, be sure to clear the port P5 direction  
pin, in order to set the port P5 pin to the input mode.  
registers bit, corresponding to port P5  
3
3
Note: This is set by the pulse output trigger select bits (bits 7, 6 at address A816).  
Table 9.5.1 Setting of INT according to valid edges  
3
Valid edge input to pin RTPTRG0  
Setting of INT  
Falling (edge sense)  
Rising (edge sense)  
Falling and Rising (edge sense): used alternately  
3
(Note)  
Falling  
Rising  
Falling and Rising  
Note: Refer to section 6.10 External interrupts.”  
(2) RTP1  
0
to RTP1  
3
in pulse mode 0; RTP1  
2
, RTP1 in pulse mode 1  
3
The pulse output trigger is an internal trigger.  
A trigger occurs at an underflow of timer A3. This trigger occurrences can be confirmed by using the  
timer A3 interrupt request bit.  
7905 Group Users Manual Rev.1.0  
9-31  
 复制成功!