PULSE OUTPUT PORT MODE
9.1 Overview
Table 9.1.3 Overview of pulse output port 1
Operation mode
Pulse mode 0
RTP3 to RTP3
(P4 to P4
Pulse mode 1
RTP3 , RTP3
(P4 , P4
RTP2
0
to RTP2
3
2
3
RTP2
RTP3
0
0
to RTP2
, RTP3
3
,
Pulse output
pins
0
3
(P4 to P4 )
0
3
6
7
)
1
4
7
)
(P4
0
to P4 )
5
Underflow occurrence
in timer A5
or
Valid edge of signal
input to pin RTPTRG1
Pulse output
data register 0
(bits 0 to 3)
Underflow of timer A8
Underflow of
timer A8
Underflow of timer A5
or
Valid edge of signal
input to pin RTPTRG1
Pulse output
trigger
Pulse output data
register 1
(bits 6, 7)
Pulse output
data register 0
(bits 0 to 5)
Available (Note)
(timers A6, A7, A9
used)
Pulse output data
register 1
(bits 4 to 7)
Register where
output data is
to be set
Pulse width
modulation
Available
(timer A6 used)
Not available
Not available
Available
P4OUTCUT
(Input of falling edge)
Not available
—
Negative pulse output
Pulse-output-
cutoff signal
input pin
Available
—
Available
P4OUTCUT
(Input of falling edge)
Note: The pulse output pins, where pulse width modulation is to be applied, determine the timer to be used.
➀➀6 pins
RTP2
0
to RTP2
3
, RTP3
0
, RTP3 : timer A6
1
➀ 2 groups of 3 pins
• RTP2
• RTP2
0
3
to RTP2
2
: timer A6
: timer A7
, RTP3 , RTP3
0
1
➀➀3 groups of 2 pins
• RTP2
• RTP2
• RTP3
0
2
0
, RTP2
, RTP2
, RTP3
1
3
1
: timer A6
: timer A7
: timer A9
7905 Group User’s Manual Rev.1.0
9-3
RENESAS [ RENESAS TECHNOLOGY CORP ]
