PULSE OUTPUT PORT MODE
9.2 Block description of pulse output port 0
9.2 Block description of pulse output port 0
Figure 9.2.1 shows the block diagram of pulse output port 0. Also, the pulse-output-port-0-relevant registers
are described below.
In pulse output port 0 and three-phase waveform mode, the following registers are used in common: the
waveform output mode register (address A616), three-phase output data register 0 (address A816), and three-
phase output data register 1 (address A916). After pulse output port 0 is set by the waveform output select
bits (bits 2 to 0 at address A616), be sure to set the relevant registers.
Note that, when not using pulse output port 0 and three-phase waveform mode, be sure to fix the waveform
output select bits (bits 2 to 0 at address A616) to “000 .”
2
Pulse width modulation timer select bits
(bits 5, 4 at address A616)
Pulse width modulation
output of timer A1
Pulse output trigger select bits
(bits 7, 6 at address A816)
Pulse width modulation
output of timer A2
Pulse width
modulation
circuit
Pulse width modulation
output of timer A4
RTPTRG0
Timer A0
Pulse width modulation enable bits
0 through 2
(bits 0 through 2 at address A916)
Waveform output control bit 1
(bit 7 at address A616)
T
b0
D
D
Q
Q
D Q
R
b1
b2
P6OUTCUT
D
Q
Bits 0 through 3 of three-
Reset
phase output data register 0
(address A816)
T
RTP00
RTP01
b0
D
D
Q
Q
b1
b2
RTP02
RTP03
D
D
Q
Q
b3
Pulse output mode
select bit
(bit 3 at address A616)
T
RTP10
RTP11
b4
b5
D
D
Q
Q
Bits 4, 5 of three-phase output data register 0
(address A816)
or
Bits 4, 5 of three-phase output data register 1
(address A916)
D
D
Q
Q
b6
b7
RTP12
RTP13
T
Pulse output polarity
select bit
(bit 3 at address A916)
Waveform output
control bit 0
(bit 6 at address A616)
D Q
Bits 6, 7 of three-phase
output data register 1
(address A916)
Timer 3
R
Reset
Fig. 9.2.1 Block diagram of pulse output port 0
7905 Group User’s Manual Rev.1.0
9-4
RENESAS [ RENESAS TECHNOLOGY CORP ]
