TIMER A
7.5 One-shot pulse mode
7.5.1 Setting for one-shot pulse mode
Figures 7.5.2 and 7.5.3 show an initial setting example for registers related to the one-shot pulse mode.
Note that when using interrupts, set up to enable the interrupts. For details, refer to “CHAPTER 6.
INTERRUPTS.”
Selecting one-shot pulse mode and each function
b7
b0
Timer Ai mode register (i = 0 to 9)
(Addresses 5616 to 5A16, D616 to DA16
0
1 1 0
)
Selection of one-shot pulse mode
Trigger select bits
b4 b3
0 0 :
0 1 :
Writing “1” to one-shot start bit: Internal trigger
1 0 : Falling of TAiIN pin’s input signal: External trigger
1 1 : Rising of TAiIN pin’s input signal: External trigger
Count source select bits
See Table 7.2.3.
Setting “H” level width of one-shot pulse
Timer A0 register (Addresses 4716, 4616
)
)
(b15)
(b8)
b0 b7
Timer A1 register (Addresses 4916, 4816
b7
b0
Timer A2 register (Addresses 4B16, 4A16
)
Timer A3 register (Addresses 4D16, 4C16
)
Timer A4 register (Addresses 4F16, 4E16
Timer A5 register (Addresses C716, C616
Timer A6 register (Addresses C916, C816
)
)
)
Timer A7 register (Addresses CB16, CA16
)
Timer A8 register (Addresses CD16, CC16
)
Timer A9 register (Addresses CF16, CE16
)
Can be set to “000016” to “FFFF16” (n).
n
“H” level width =
Note.
fi
fi = Frequency of count source
However, if n = “000016”, the counter does not operate and the
TAi OUT pin outputs “L” level. At this time, no timer Ai interrupt
request occurs.
Setting interrupt priority level
b7
b0
Timer Ai interrupt control register (i = 0 to 9)
(Addresses 7516 to 7916, F516 to F916
)
Interrupt priority level select bits
When using interrupts, set these bits to one of levels 1 to 7.
When disabling interrupts, set these bits to level 0.
Continued to Figure 7.5.3
on the next page
Fig. 7.5.2 Initial setting example for registers related to one-shot pulse mode (1)
7905 Group User’s Manual Rev.1.0
7-31
RENESAS [ RENESAS TECHNOLOGY CORP ]
