RTL8201E(L)
Datasheet
4. Block Diagram
100 M
Data
Alignment
RXD
5B
4B
Descrambler
Decoder
RXC 25M
MII
Interface
10/100
RMII
Half/Full
Interface
Switch
Logic
TXD
4B
5B
Scrambler
SNI
25M
Encoder
TXC
Interface
10/100M Auto-negotiation
Control Logic
Link Pulse
10M
TXC10
TXD10
Manchester Coded
Waveform
10M Output Waveform
Shaping
RXC10
RXD10
Data Recovery
Receive Low Pass Filter
TD+
25M
TXC
TXO+
Parrallel
to Serial
3 Level
Driver
TXO-
TXD
Variable
Current
Baseline
Wander
Correction
Peak
Detect
RXIN+
RXIN-
3 Level
MLT-3
to NRZI
Adaptive
Equalizer
Comparator
25M
RXC
ck
Master
PPL
Serial to
Parrallel
Slave
PLL
RXD
data
Control
Voltage
25M
Figure 1. Block Diagram
Single-Chip/Port 10/100 Fast Ethernet PHYceiver
with Auto MDIX
3
Track ID: JATR-1076-21 Rev. 1.3
REALTEK [ Realtek Semiconductor Corp. ]
