RTL8201E(L)
Datasheet
6. Pin Descriptions
I: Input
LI: Latched Input during Power up or Reset
O: Output
IO: Bi-directional input and output
P: Power
HZ: High impedance during power on reset
PD: Internal Pull down during power on reset
PU: Internal Pull up during power on reset
6.1. MII Interface
Table 1. MII Interface
Pin No. Pin No. Description
(48-Pin) (32-Pin)
Name
Type
TXC
O/HZ
22
15
Transmit Clock.
This pin provides a continuous clock as a timing reference for
TXD[3:0] and TXEN.
TXEN
I/PD
I/PD
27
20
Transmit Enable.
The input signal indicates the presence of valid nibble data on
TXD[3:0]. An internal weakly pulled low resistor prevents the bus
floating.
TXD[0:3]
RXC
23, 24,
25, 26
16, 17, Transmit Data.
18, 19 The MAC will source TXD[0:3] synchronous with TXC when TXEN is
asserted. An internal weakly pulled low resistor prevents the bus
floating.
O/HZ
19
38
13
27
Receive Clock.
This pin provides a continuous clock reference for RXDV and
RXD[0:3] signals. RXC is 25MHz in 100Mbps mode and 2.5MHz in
10Mbps mode.
COL/SNI
LI/O/PD
Collision Detect.
COL is asserted high when a collision is detected on the media.
This pin’s status is latched at power on reset to determine at which
interface mode to operate:
0: MII/RMII mode
1: SNI mode
This pin can be directly connected to GND or VCC.
Note: Only the RTL8201E(L)-VB supports RMII mode.
CRS/RPTR/
CRS_DV
LI/O/PD
36
26
Carrier Sense.
This pin’s signal is asserted high if the media is not in Idle state.
At power on reset, this pin set high to put the RTL8201E(L) into
repeater mode.
This pin can be directly connected to GND or VCC.
Single-Chip/Port 10/100 Fast Ethernet PHYceiver
with Auto MDIX
6
Track ID: JATR-1076-21 Rev. 1.3
REALTEK [ Realtek Semiconductor Corp. ]
