RTL8201E(L)
Datasheet
8.6. Serial Network Interface
The RTL8201E(L) also supports the traditional 7-wire serial interface to operate with legacy MACs or
embedded systems. To setup for this mode of operation, pull the COL/SNI pin high. In this mode, the
RTL8201E(L) will set the default operation to 10Mbps and half-duplex mode. This interface consists of a
10Mbps transmit and receive clock generated by PHY, 10Mbps transmit and receive serial data, transmit
enable, collision detect, and carry sense signals.
8.7. Power Down, Link Down, and Power Saving Modes
Three types of Power Saving mode operation are supported. This section describes how to implement
each mode through software.
Table 26. Power Saving Mode Pin Settings
Mode
Description
Analog Off
Setting bit 11 of register 17 to 1 will put the RTL8201E(L) into analog off state. In analog off state, the
RTL8201E(L) will power down all analog functions such as transmit, receive, PLL, etc. However, the
internal 25MHz crystal oscillator will not be powered down. Digital functions in this mode are still
available which allows reacquisition of analog functions
LDPS
PWD
Setting bit 12 of register 17 to 1 will put the RTL8201E(L) into LDPS (Link Down Power Saving) mode.
In LDPS mode, the RTL8201E(L) will detect the link status to decide whether or not to turn off the
transmit function. If the link is off, FLP or 100Mbps IDLE/10Mbps NLP will not be transmitted.
However, some signals similar to NLP will be transmitted. Once the receiver detects leveled signals, it
will stop the signal and transmit FLP or 100Mbps IDLE/10Mbps NLP again. This can cut power used by
60%~80% when the link is down.
Setting bit 11 of register 0 to 1 puts the RTL8201E(L) into power down mode. This is the maximum
power saving mode while the RTL8201E(L) is still alive. In PWD mode, the RTL8201E(L) will turn off
all analog/digital functions except the MDC/MDIO management interface. Therefore, if the
RTL8201E(L) is put into PWD mode and the MAC wants to recall the PHY, it must create the
MDC/MDIO timing by itself (this is done by software).
Single-Chip/Port 10/100 Fast Ethernet PHYceiver
with Auto MDIX
22
Track ID: JATR-1076-21 Rev. 1.3