RTL8201E(L)
Datasheet
8.4. Hardware Configuration and Auto-Negotiation
This section describes methods to configure the RTL8201E(L) and set the auto-negotiation mode. Table
25 shows the various pins and their settings.
Table 25. Auto-Negotiation Mode Pin Settings
Pin Name
Description
CRS/RPTR/
CRS_DV
Pull high to set the RTL8201E(L) into Repeater Mode.
This pin is pulled low by default (see 8.9 Repeater Mode Operation, page 24).
COL/SNI
Pull low to set the RTL8201E(L) into MII/RMII Mode operation, which is the Default Mode for the
RTL8201E(L). This pin pulled high will set the RTL8201E(L) into SNI mode operation. When set to SNI
mode, the RTL8201E(L) will operate at 10Mbps (see section 8.6 Serial Network Interface, page 22).
8.5. LED and PHY Address Configuration
In order to reduce the pin count on the RTL8201E(L), the LED pins are duplexed with the PHY address
pins. The external combinations required for strapping and LED usage must be considered in order to
avoid contention. Specifically, when the LED outputs are used to drive LEDs directly, the active state of
each output driver is dependent on the logic level sampled by the corresponding PHYAD input upon
power-up/reset. For example, as Figure 6 (left-side) shows, if a given PHYAD input is resistively pulled
high, then the corresponding output will be configured as an active low driver. On the right side, we can
see that if a given PHYAD input is resistively pulled low then the corresponding output will be
configured as an active high driver. The PHY address configuration pins should not be connected to GND
or VCC directly, but must be pulled high or low through a resistor (e.g., 4.7KΩ). If no LED indications
are needed, the components of the LED path (LED+510Ω) can be removed.
PHY Address[:]=Logical 1
LED Indication=Active low
PHY Address[:]=Logical 0
LED Indication=Active High
Figure 6. LED and PHY Address Configuration
Single-Chip/Port 10/100 Fast Ethernet PHYceiver
with Auto MDIX
21
Track ID: JATR-1076-21 Rev. 1.3
REALTEK [ Realtek Semiconductor Corp. ]
