WM72016 – Secure F-RAM with Gen-2 RFID and Serial Port
Figure 9. Block Write Command: Effect of AUTOINCR
DUAL SERIAL PERIPHERAL INTERFACE (DSPI)
The WM72016 employs a dual serial peripheral interface (DSPI) bus providing a serial communication port to
a host microcontroller for the purpose of directly reading and writing memory. The interface uses four pins as
shown in Table 6: below.
Table 6: DSPI Interface
Signal Name Direction
Description
Chip Select
Data bit 1
Data bit 0
Clock
CS
INPUT/OUTPUT
D1
INPUT/OUTPUT
INPUT/OUTPUT
INPUT
D0
CLK
A single DSPI access cycle is composed of a 16-bit instruction word and a 16-bit data word as shown in Figure
10. A DSPI read/write cycle is initiated by asserting CS high followed by 16 clock cycles. The host drives the
first set of 8 clock cycles to write 2 data bytes comprising an instruction word – the second set of 8 clock
cycles are required for the 16-bit data word. Command and data bits are interleaved across two DSPI data
signals in such a manner that odd numbered bits are driven on one data signal while even numbered bits are
driven on the other data signal as shown in Figure 11. This results in a 16-bit word transfer on the D0 and D1
signals every 8 clock cycles.
Figure 10. DSPI Cycle
Rev. 1.2
Sept. 2010
Page 12 of 21
RAMTRON [ RAMTRON INTERNATIONAL CORPORATION ]
