72Mbit Pipelined BSRAM
w/ NoBL Architecture
2Mx36
Preliminary Data Sheet
Boundary Scan Order
Scan Bit #
Signal
Name
BGA Pin Scan Bit #
Location
Signal
Name
BGA Pin Scan Bit #
Location
Signal
Name
BGA Pin
Location
0
1
LBO#
A
3R
3A
4A
5A
6A
4N
4P
2T
3T
4T
5T
6T
2R
6R
4G
2C
6P
7P
6N
7N
6M
6L
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
DQb
DQb
DQb
DQb
DQb
DQb
DQb
DQb
DQb
A
6H
7H
6G
7G
6F
6E
7E
6D
7D
3C
5C
6C
3B
4B
4F
4M
4H
4K
6B
5L
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
A
5B
2A
1H
2H
1G
2G
2F
1E
2E
1D
2D
1P
2P
1N
2N
2M
1L
A
2
A
DQc
DQc
DQc
DQc
DQc
DQc
DQc
DQc
DQc
DQd
DQd
DQd
DQd
DQd
DQd
DQd
DQd
DQd
3
A
4
A
5
A1
A0
A
6
7
8
A
9
A
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
A
A
A
A
A
A
A
LD#
G#
A
A
CKE#
R/W#
CLK
CE3#
BWa#
BWb#
BWc#
BWd#
CE2
DQa
DQa
DQa
DQa
DQa
DQa
DQa
DQa
DQa
2L
1K
2K
5G
3G
3L
7L
6K
7K
2B
4E
CE1#
Enhanced Memory Systems Inc., 1850 Ramtron Dr., Colo Spgs, CO 80921
PHONE: (800) 545-DRAM; FAX: (719) 488-9095; http://www.edram.com
Copyright 2001 Enhanced Memory Systems. All rights reserved.
The information contained herein is subject to change without notice.
Page 24 of 30
Revision 1.0