72Mbit Pipelined BSRAM
w/ NoBL Architecture
2Mx36
Preliminary Data Sheet
Once the data is captured, it is possible to shift out the data by putting the TAP into the Shift-DR state. This places the
Boundary Scan register between the TDI and TDO pins.
Note that since the PRELOAD part of this instruction is not implemented, putting the TAP into the Update to the
Update-DR state while performing a SAMPLE/PRELOAD instruction has the same effect as the Pause-DR instruction.
BYPASS
When the BYPASS instruction is loaded in the Instruction register and the TAP is placed in a Shift-DR state, the
Bypass register is placed between the TDI and TDO pins. The advantage of the BYPASS instruction is that it shortens
the boundary scan path when multiple devices are connected together on a board.
RESERVED
These instructions are not implemented but are reserved for future use. Do not use these instructions.
Enhanced Memory Systems Inc., 1850 Ramtron Dr., Colo Spgs, CO 80921
PHONE: (800) 545-DRAM; FAX: (719) 488-9095; http://www.edram.com
Copyright 2001 Enhanced Memory Systems. All rights reserved.
The information contained herein is subject to change without notice.
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