FM28V020 - 32Kx8 F-RAM
Functional Truth Table
/CE
/WE
H
X
H
L
H
L
H
L
L
L
X
Notes:
1)
2)
3)
4)
A(14:3)
X
V
No Change
Change
V
V
No Change
X
A(2:0)
X
V
Change
V
V
V
V
X
Operation
Standby/Idle
Read
Page Mode Read
Random Read
/CE-Controlled Write
2
/WE-Controlled Write
2, 3
Page Mode Write
4
Starts Precharge
H=Logic High, L=Logic Low, V=Valid Address, X=Don’t Care.
For write cycles, data-in is latched on the rising edge of /CE or /WE, whichever comes first.
/WE-controlled write cycle begins as a Read cycle and A(14:3) is latched then.
Addresses A(2:0) must remain stable for at least 15 ns during page mode operation.
Rev. 2.1
June 2011
Page 3 of 14