FM24CL16B - 16Kb 3V I2C F-RAM
simultaneously aborts the write operation and allows
the read command to be issued with the slave address
set to 1. The operation is now a current address read.
This operation is illustrated in Figure 9.
By Master
Start
Address
No
Acknowledge
Stop
S
By FM24CL16
Slave Address
1 A
Data Byte
1
P
Acknowledge
Data
Figure 7. Current Address Read
By Master
Start
Address
Acknowledge
No
Acknowledge
Stop
S
By FM24CL16
Slave Address
1 A
Data Byte
A
Data Byte
1 P
Acknowledge
Data
Figure 8. Sequential Read
By Master
Start
Address
Start
Address
Acknowledge
No
Acknowledge
Stop
S
By FM24CL16
Slave Address
0 A
Word Address
A
S
Slave Address
1 A
Data Byte
A
Data Byte
1 P
Acknowledge
Data
Figure 9. Selective (Random) Read
Rev. 1.4
Feb. 2011
Page 7 of 13
RAMTRON [ RAMTRON INTERNATIONAL CORPORATION ]
