FM21L16 - 128Kx16 FRAM
Functional Truth Table
1,2
/CE
/WE
A(16:2)
X
X
X
H
X
X
H
V
↓
L
H
No Change
L
H
Change
L
V
↓
L
V
↓
L
No Change
↓
X
X
↑
Notes:
1)
2)
3)
4)
H=Logic High, L=Logic Low, V=Valid Data, X=Don’t Care.
/WE-controlled write cycle begins as a Read cycle and A(16:2) is latched then.
Addresses A(1:0) must remain stable for at least 10 ns during page mode operation.
For write cycles, data-in is latched on the rising edge of /CE or /WE, whichever comes first.
A(1:0)
X
X
V
Change
V
V
V
V
X
/ZZ
L
H
H
H
H
H
H
H
H
Operation
Sleep Mode
Standby/Idle
Read
Page Mode Read
Random Read
/CE-Controlled Write
/WE-Controlled Write
2
Page Mode Write
3
Starts Precharge
Byte Select Truth Table
/OE
/LB
/UB
H
X
X
X
H
H
L
H
L
L
H
L
L
X
H
L
L
H
L
L
Operation
Read; Outputs Disabled
Read; DQ(7:0) Hi-Z
Read; DQ(15:8) Hi-Z
Read
Write; Mask DQ(7:0)
Write; Mask DQ(15:8)
Write
Simplified Sleep/Standby State Diagram
Rev. 1.0
Sept. 2007
Page 3 of 14
RAMTRON [ RAMTRON INTERNATIONAL CORPORATION ]
