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QT60326 参数 Datasheet PDF下载

QT60326图片预览
型号: QT60326
PDF下载: 下载PDF文件 查看货源
内容描述: 32和48个重点QMATRIX集成电路 [32 & 48 KEY QMATRIX ICs]
分类和应用:
文件页数/大小: 32 页 / 881 K
品牌: QUANTUM [ QUANTUM RESEARCH GROUP ]
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In SPI communications, when the QT60xx6 responds to a  
command with one or more response bytes, the host can issue  
a new command instead of a null on the last byte shift  
operation.  
The host can monitor the progress of the recalibration by  
checking the status byte, using command 0x05, during the  
course of the calibration.  
A key will show an error flag (using command 0x8k) indicating  
the key has failed calibration if its signal is too noisy or if its  
signal is below the low signal threshold. A key is deemed too  
noisy if, at the end of calibration, the signal is no longer  
between its computed negative hysteresis level and positive  
thresholds.  
New commands during intermediate byte shift-out operations  
are ignored, and null bytes should always be used.  
4.2 Enter Setups Mode - 0x01  
This command is used to initiate the Setups block transfer from  
Host to QT.  
4.4 Force Reset - 0x04  
The command must be repeated 2x within 100ms or the  
command will fail; the repeating command must be sequential  
without any intervening command. After the 2nd 0x01 from the  
host, the QT will stop scanning keys and reply with the  
character 0xFE. In SPI mode this character must be shifted out  
by sending a null (0x00) from the host. This command  
suspends normal sensing starting from the receipt of the  
second 0x01. A failure of the command will cause a timeout.  
The command must be repeated 2x within 100ms or the  
command will fail; the repeating command must be sequential  
without any intervening command. After the 2nd 0x04, the  
device will reply with the character 0xFB just prior to executing  
the reset operation.  
After any reset, the device automatically performs a full key  
calibration on all keys.  
Each byte in the block must arrive at the QT no later than  
100ms after the previous one or a timeout will occur. Any  
timeout will cause the device to cancel the block load and go  
back to normal operation.  
The host can monitor the progress of the reset to see when the  
chip is operating again by checking the status byte for  
recalibration, by repeatedly issuing command 0x05 (see below).  
If no response comes back, the command was not received and  
the device should preferably be reset by the host just in case  
there are any other problems.  
4.5 General Status - 0x05  
This command returns the general status bits. This command is  
not as useful as the 0x06 command for routine use. The bits  
returned from 0x05 are as follows:  
If 0xFE is received by the host from the QT, then the host  
should begin to transmit the block of Setups to the QT. The  
DRDY line handshakes the data. The delay between bytes can  
be as short as 10µs but the host can make it longer than this if  
required, but no more than 100ms. The last two bytes the host  
should send is the CRC for the block of data only (ie the CRC  
should not include the command in its calculation).  
BIT  
7
Description  
Reserved  
6
1= communications failure  
1= FMEA failure detected  
1= eeprom corrupt  
1= Mains sync error  
1= calibration has failed on an  
enabled key or, an LSL failure  
1= any key in calibration  
1= any key in detect  
5
4
3
After the block transfer the QT will check the CRC and respond  
with 0x00 if there was an error. Regardless, it will program the  
internal eeprom. If the CRC was correct it will reply with a  
second 0xFE after the eeprom was programmed.  
2
1
0
If there was an error in the block transfer the device will restore  
the last known good Setups from Flash memory the next time  
the device is reset. However until that point, the device will  
attempt to operate using the new Setups block even if it is  
corrupt. Note that some Setups do not take effect until the part  
is reset (e.g. Baud rate).  
Notes:  
Bit 6: Set if a communications failure. This can be reset by  
sending command 0x0f (“last command command”) repeatedly  
until a response of 0xf0 is received.  
Bit 5: Set if an FMEA error was detected during operation. See  
Section 2.16. A further amplification of what the FMEA error  
consisted of is described in Section 4.12.  
At the end of the full block load sequence, the device restarts  
sensing without recalibration. Most of the setups in the block  
will take effect immediately, but it is important to reset the  
device after a block load to make all the changes effective  
and permanent. See Section 4.4.  
Bit 4: Set if eeprom corruption was detected. If this happens, it  
is recommended that the device be reset. If a reset does not  
cure the problem, the Setups block should be reloaded (Section  
4.2) and the device reset again.  
Command response timing: Responses to the bytes in the  
setups block (both DRDY and return byte at the end) by the  
part can take as long as 20ms each.  
Bit 3: Set if there was a mains sync error, for example there  
was no Sync signal detected within the allotted 100ms amount  
of time. See Section 5.12. This condition is not necessarily fatal  
to operation, however the device will operate very slowly and  
may suffer from noise problems if the sync feature was required  
for noise reasons.  
4.3 Cal All - 0x03  
This command must be repeated 2x within 100ms or the  
command will fail; the repeating command must be sequential  
without any intervening command.  
Bit 2: Reports either a cal failure (failed in 5 sequential  
attempts) on any enabled key or, that an enabled key has a  
very low signal reference value, lower than the user-settable  
LSL value (Section 5.15).  
After the 2nd 0x03 from the host, the QT will reply with the  
character 0xFC. Shortly thereafter the device will recalibrate all  
keys and restart operation.  
Bit 1: Set if any key is in the process of calibrating.  
Bit 0: Set if any key is in detection (touched).  
If no 0xFC comes back, the command was not properly  
received and the device should preferably be reset.  
lQ  
14  
QT60486-AS R8.01/0105  
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