Figure 2.7 Wiring Diagram
100nF
100nF
VDD
100nF
Vunreg
+5V VREG
+
+
4.7uF
4.7uF
26
25
24
23
X7
X6
X5
X4
X3
X2
X1
X0
X7
X6
X5
X4
X3
X2
X1
X0
4
RST
RX7
RX3
1K
1K
RX6
RX2
1K
1K
SCOPE
43
S_SYNC
SS
RX5
RX1
1K
1K
44
1
/SS
MOSI
MISO
SCLK
RX4
RX0
1K
1K
22
21
20
19
MOSI
MISO
SCK
2
3
9
10
11
Rx
Tx
Rx
Tx
16
30
Y0
Y1
Y2
Y3
Y4
Y5
Y0A
Y0B
Y1A
Y1B
Y2A
Y2B
Y3A
Y3B
Y4A
Y4B
Y5A
Y5B
RY0 1K
RY1 1K
RY2 1K
RY3 1K
RY4 1K
RY5 1K
CS0
CS1
CS2
CS3
CS4
CS5
4.7nF
4.7nF
4.7nF
4.7nF
4.7nF
4.7nF
WAKE
SYNC
WS
15
31
QT60326
QT60486
41
40
DRDY
DRDY
14
32
LED
4.7K
13
33
8
7
XT1
XT2
16 MHz 3-TERM
RESONATOR
Note 1
Note 1
Note 1
Note 1
34
35
36
37
6
18
39
28
Vss
Vss
Vss
Vss
10K
100
VDD
Note 1: Leave Y4A, Y4B, Y5A, Y5B
unconnected for QT60326
RS5 RS4 RS3 RS2 RS1 RS0
Note:
Use either UART or SPI comm port but not both. Device defaults to SPI communications but if it receives a UART byte at
any time, locks into UART mode instead. See Table 2.2 for connections when pins are unused.
lQ
10
QT60486-AS R8.01/0105
QUANTUM [ QUANTUM RESEARCH GROUP ]
