QN8006B/8006LB
6 DIGITAL AUDIO INTERFACE PROTOCOL
6.1 Introduction
The QN8006 uses an I2S interface to transfer audio data to and from the external source.
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Master or Slave modes are supported.
Multiple data widths are supported: 8, 16, 24, and 32 bits.
Multiple data alignments are supported: I2S, DSP1, DSP2, MSB-Justified, and LSB-Justified modes. All the above 5
modes are supported when the QN8006 works as a receiver, and only I2S normal and DSP2 mode is supported when
the QN8006 is a transmitter.
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The terms 'transmitter' and 'receiver' as described below are from the QN8006's point of view.
6.2 I2S BUS Signal Description
A 3-line serial bus is used consisting of a line for two time-multiplexed data channels, a word select line, and a clock line.
The following figure shows how to use these three signals in the QN8006.
Figure 14: Top Level Block Diagram of I2S
In Master mode, the serial clock signal SCK and the word selection signal WS are generated by the QN8006 and are output
to the external device. In Slave mode, those two signals are input signals from the external device.
As transmitter, the QN8006 sends the serial data to the external device by the SD signal. As receiver, it receives the serial
data from the external device by the SD signal.
Rev 2.08 (04/10)
Copyright ©2010 by Quintic Corporation
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