Data Sheet.
HY[B/E]18L512160BF-7.5
512-Mbit Mobile-RAM
TABLE 13
Timing Parameters for WRITE
Parameter
Symbol
- 7.5
Units
Notes
min.
max.
DQ and DQM input setup time
DQ and DQM input hold time
DQM write mask latency
ACTIVE to ACTIVE command period
ACTIVE to READ or WRITE delay
ACTIVE to PRECHARGE command period
WRITE recovery time
tIS
tIH
1.5
0.8
0
67
19
45
14
19
—
—
—
—
—
100k
—
ns
ns
—
—
tDQW
tRC
tRCD
tRAS
tWR
tRP
tCK
ns
ns
ns
ns
ns
—
1)
1)
1)
1)
1)
PRECHARGE command period
—
1) These parameters account for the number of clock cycles and depend on the operating frequency as follows:no. of clock cycles = specified
delay / clock period; round up to next integer.
FIGURE 25
WRITE Burst (CAS Latency = 2)
#,+
T2#$
T72
T20
T2!3
T2#
!#4
./0
72)4%
./0
./0
./0
./0
02%
./0
!#4
#OMMAND
!DDRESS
"A !ꢀ
"A !ꢀ
#OL N
"A !ꢀ
2OW X
2OW B
0RE !LL
!0
$IS
!0
!ꢅꢆ ꢇ!0ꢈ
$1
2OW X
2OW B
0RE "ANK !
$) N
$) Nꢉꢅ
$) Nꢉꢊ
$) Nꢉꢄ
"A !ꢀ #OL N ꢁ BANK !ꢀ COLUMN N
$) N ꢁ $ATA )N TO COLUMN N
ꢁ $ONgT #ARE
"URST ,ENGTH ꢁ ꢂ IN THE CASE SHOWNꢃ
ꢄ SUBSEQUENT ELEMENTS OF $ATA )N ARE PROVIDED IN THE PROGRAMMED ORDER FOLLOWING $) Nꢃ
Rev. 1.22, 2006-12
01132005-06IU-IGVM
29
QIMONDA [ QIMONDA AG ]
