Data Sheet.
HY[B/E]18L512160BF-7.5
512-Mbit Mobile-RAM
FIGURE 5
Address / Command Inputs Timing Parameters
T#+
T#(
T#,
#,+
T)3 T)(
6ALID
)NPUT ꢁꢂ
6ALID
6ALID
ꢀ $ONgT #ARE
ꢁꢂ ꢀ !ꢃ ꢄ !ꢅꢆꢇ "!ꢃꢇ "!ꢅꢇ #3ꢇ #+%ꢇ 2!3ꢇ #!3ꢇ 7%
TABLE 9
Inputs Timing Parameters
Parameter
Symbol
- 7.5
min.
Unit
Notes
max.
Clock cycle time
Clock frequency
CL = 3
CL = 2
CL = 3
CL = 2
tCK
fCK
7.5
9.5
—
—
—
133
105
—
—
ns
ns
MHz
MHz
ns
ns
ns
ns
—
—
—
—
—
—
—
—
—
Clock high-level width
Clock low-level width
Address and command input setup time
Address and command input hold time
tCH
tCL
tIS
2.5
2.5
1.5
0.8
—
—
tIH
Rev. 1.22, 2006-12
16
01132005-06IU-IGVM