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HYE18L512160BF-7.5 参数 Datasheet PDF下载

HYE18L512160BF-7.5图片预览
型号: HYE18L512160BF-7.5
PDF下载: 下载PDF文件 查看货源
内容描述: DRAM的移动应用512 - Mbit的移动-RAM [DRAMs for Mobile Applications 512-Mbit Mobile-RAM]
分类和应用: 存储内存集成电路动态存储器时钟
文件页数/大小: 57 页 / 2043 K
品牌: QIMONDA [ QIMONDA AG ]
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Data Sheet.  
HY[B/E]18L512160BF-7.5  
512-Mbit Mobile-RAM  
Burst Length  
Starting Column Address  
Order of Accesses Within a Burst  
A2  
A1  
A0  
Sequential  
Interleaved  
8
0
0
0
0
1
1
1
1
n
0
0
1
1
0
0
1
1
n
0
1
0
1
0
1
0
1
n
0 - 1 - 2 - 3 - 4 - 5 - 6 - 7  
1 - 2 - 3 - 4 - 5 - 6 - 7 - 0  
2 - 3 - 4 - 5 - 6 - 7 - 0 - 1  
3 - 4 - 5 - 6 - 7 - 0 - 1 - 2  
4 - 5 - 6 - 7 - 0 - 1 - 2 - 3  
5 - 6 - 7 - 0 - 1 - 2 - 3 - 4  
6 - 7 - 0 - 1 - 2 - 3 - 4 - 5  
7 - 0 - 1 - 2 - 3 - 4 - 5 - 6  
Cn, Cn+1, Cn+2, …  
0 - 1 - 2 - 3 - 4 - 5 - 6 - 7  
1 - 0 - 3 - 2 - 5 - 4 - 7 - 6  
2 - 3 - 0 - 1 - 6 - 7 - 4 - 5  
3 - 2 - 1 - 0 - 7 - 6 - 5 - 4  
4 - 5 - 6 - 7 - 0 - 1 - 2 - 3  
5 - 4 - 7 - 6 - 1 - 0 - 3 - 2  
6 - 7 - 4 - 5 - 2 - 3 - 0 - 1  
7 - 6 - 5 - 4 - 3 - 2 - 1 - 0  
not supported  
Full Page  
Notes  
1. For a burst length of 2, A1-Ai select the two-data-element block; A0 selects the first access within the block.  
2. For a burst length of 4, A2-Ai select the four-data-element block; A0-A1 select the first access within the block.  
3. For a burst length of 8, A3-Ai select the eight-data-element block; A0-A2 select the first access within the block.  
4. For a full page burst, A0-Ai select the starting data element.  
5. Whenever a boundary of the block is reached within a given sequence, the following access wraps within the block.  
2.2.1.2  
Burst Type  
Accesses within a given burst may be programmed to be either sequential or interleaved. This is referred to as the burst type  
and is selected via bit A3. The ordering of accesses within a burst is determined by:  
the burst length  
the burst type  
the starting column address  
This is listed in Table 6.  
2.2.1.3  
Read Latency  
The Read latency, or CAS latency, is the delay, in clock cycles, between the registration of a READ command and the  
availability of the first segment of output data. The latency can be programmed to 2 or 3 clocks.  
If a READ command is registered at clock edge n, and the latency is m clocks, the data will be available with clock edge n + m  
(for more detailed information, please refer to the READ command description).  
2.2.1.4  
Write Burst Mode  
When A9 = 0, the burst length programmed via A0-A2 applies to both read and write bursts; when A9 = 1, write accesses  
consist of single data elements only.  
Rev. 1.22, 2006-12  
11  
01132005-06IU-IGVM  
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